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Analysis and simulation of Au/InSb/InP diode C V characteristic: modeling and experiments B. Akkal a,b, * , Z. Benamara b , B. Gruzza a , L. Bideux a , N. Bachir Bouiadjra b a Laboratoire des Sciences des Mate ´riaux pour l’Electronique et d’Automatique, Universite ´ Blaise Pascal de Clermont II, Les Ce ´zeaux, 63177, Aubie `re Cedex, France b Laboratoire de Micro-e ´lectronique Applique ´e, Universite ´ Djillali Liabe `s de Sidi Bel Abbe `s, 22000, Sidi-Bel-Abbe `s, Algeria Abstract The effects of the energy density distribution and relaxation time of the interface state on electric parameters of Au/InSb/InP(100) Schottky diodes were investigated, in the latter diode, InSb forms a fine restructuration layer allowing to block P atoms migration to surface. To be sure of the disappearance of the In droplets, a high quantity of Sb was evaporated and the excess was eliminated by heating the substrate surface at 300 jC before evaporating Au onto it. The current – voltage I(V G ) and capacitance – voltage C(V G ) characteristics are measured as a function of frequency (100 Hz– 1 MHz). Typical Ln[I/(1 e qV G / kT )] versus V G characteristics of Au/heated InSb/InP(100) Schottky diode under forward bias show two linear regions separated by a transition segment. From the first region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor n and the saturation current I s evaluated to 1.79 and 1.64 10 7 A, respectively. The mean density of interface states estimated from the C(V G ) measurements was 1.57 10 12 cm 2 eV 1 . The interface states were responsible for the non-ideal behavior of the I(V G ) characteristics, the capture cross-section r n for the fast slow varies between 2.16 10 11 and 7.13 10 12 cm 2 for the relaxation times range 7.9 10 3 – 2.4 10 2 s. D 2002 Elsevier Science B.V. All rights reserved. Keywords: Energy density distribution; Relaxation time; Au/InSb/InP(100) Schottky diodes 1. Introduction During the elaboration of semiconductor devices of the MS and MIS types, defects appear which lead to electronic states with energies located in the forbidden band, the band gap. These states are known as surface states and alter the functioning of such devices. The relationship between the admittance of the interface state charging process above and the capacitance and con- ductance of the MIS structure measured in the external circuit has been described and analyzed by Nicollian and Goetzberger [1]. They have observed that the capacitance decreases with increasing frequency. This effect is obtained at low and intermediate frequencies. The interface states can follow the AC signal and yield an excess capacitance, which depends on the relaxation time of the interface states and the frequency of the AC signal. This model can be applied to determine the interface state of a metal-interface layer- semiconductor Schottky diode. The purpose of this paper is to characterize interface states in Au/heated InSb/InP(100) Schottky diode and determine the energy density distribution and relaxation time of the interface states. The density of interface states and relaxation time are determined using capacitance meas- ured at different frequencies. 2. Experimental procedure The used InP(100) substrates were n-type wafers doped with antimony at different levels (10 15 –10 17 atoms cm 3 ). They were chemically cleaned according to a method based on successive baths of H 2 SO 4 solution, methanol solution 3% bromine, and deionized water [2]. Then, they were in- troduced into an ultra-high-vacuum (UHV) chamber at a pressure of 10 9 –10 10 Torr. The sample surface was controlled using an Auger electron spectroscopy (AES) with a retarding field analyzer. A low rate of carbon and oxygen contamination atoms was detected. These impurities were removed in situ by cleaning with low energy Ar + ions bom bardment (ions energy = 300 eV, ionic current = 2 AA cm 2 ). This operation has induced metallic In formation in the 0928-4931/02/$ - see front matter D 2002 Elsevier Science B.V. All rights reserved. PII:S0928-4931(02)00083-8 * Corresponding author. Laboratoire des Sciences des Mate ´riaux pour l’Electronique et d’Automatique, Universite ´ Blaise Pascal de Clermont II, Les Ce ´zeaux, 63177, Aubie `re Cedex, France. www.elsevier.com/locate/msec Materials Science and Engineering C 21 (2002) 291 – 296

Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

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Page 1: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

Analysis and simulation of Au/InSb/InP diode C–V characteristic:

modeling and experiments

B. Akkal a,b,*, Z. Benamara b, B. Gruzza a, L. Bideux a, N. Bachir Bouiadjra b

aLaboratoire des Sciences des Materiaux pour l’Electronique et d’Automatique, Universite Blaise Pascal de Clermont II,

Les Cezeaux, 63177, Aubiere Cedex, FrancebLaboratoire de Micro-electronique Appliquee, Universite Djillali Liabes de Sidi Bel Abbes, 22000, Sidi-Bel-Abbes, Algeria

Abstract

The effects of the energy density distribution and relaxation time of the interface state on electric parameters of Au/InSb/InP(100)

Schottky diodes were investigated, in the latter diode, InSb forms a fine restructuration layer allowing to block P atoms migration to surface.

To be sure of the disappearance of the In droplets, a high quantity of Sb was evaporated and the excess was eliminated by heating the

substrate surface at 300 jC before evaporating Au onto it. The current–voltage I(VG) and capacitance–voltage C(VG) characteristics are

measured as a function of frequency (100 Hz–1 MHz). Typical Ln[I/(1� e� qVG/kT)] versus VG characteristics of Au/heated InSb/InP(100)

Schottky diode under forward bias show two linear regions separated by a transition segment. From the first region, the slope and the

intercept of this plot on the current axis allow to determine the ideality factor n and the saturation current Is evaluated to 1.79 and

1.64� 10� 7 A, respectively. The mean density of interface states estimated from the C(VG) measurements was 1.57 1012 cm� 2 eV� 1. The

interface states were responsible for the non-ideal behavior of the I(VG) characteristics, the capture cross-section rn for the fast slow varies

between 2.16� 10� 11 and 7.13� 10� 12 cm2 for the relaxation times range 7.9� 10� 3–2.4� 10� 2s.

D 2002 Elsevier Science B.V. All rights reserved.

Keywords: Energy density distribution; Relaxation time; Au/InSb/InP(100) Schottky diodes

1. Introduction

During the elaboration of semiconductor devices of the

MS and MIS types, defects appear which lead to electronic

states with energies located in the forbidden band, the band

gap. These states are known as surface states and alter the

functioning of such devices.

The relationship between the admittance of the interface

state charging process above and the capacitance and con-

ductance of the MIS structure measured in the external

circuit has been described and analyzed by Nicollian and

Goetzberger [1]. They have observed that the capacitance

decreases with increasing frequency. This effect is obtained

at low and intermediate frequencies. The interface states can

follow the AC signal and yield an excess capacitance, which

depends on the relaxation time of the interface states and the

frequency of the AC signal. This model can be applied to

determine the interface state of a metal-interface layer-

semiconductor Schottky diode.

The purpose of this paper is to characterize interface

states in Au/heated InSb/InP(100) Schottky diode and

determine the energy density distribution and relaxation

time of the interface states. The density of interface states

and relaxation time are determined using capacitance meas-

ured at different frequencies.

2. Experimental procedure

The used InP(100) substrates were n-type wafers doped

with antimony at different levels (1015–1017 atoms cm� 3).

They were chemically cleaned according to a method based

on successive baths of H2SO4 solution, methanol solution

3% bromine, and deionized water [2]. Then, they were in-

troduced into an ultra-high-vacuum (UHV) chamber at a

pressure of 10� 9–10� 10 Torr. The sample surface was

controlled using an Auger electron spectroscopy (AES) with

a retarding field analyzer. A low rate of carbon and oxygen

contamination atoms was detected. These impurities were

removed in situ by cleaning with low energy Ar+ ions bom

bardment (ions energy = 300 eV, ionic current = 2 AA cm� 2).

This operation has induced metallic In formation in the

0928-4931/02/$ - see front matter D 2002 Elsevier Science B.V. All rights reserved.

PII: S0928 -4931 (02 )00083 -8

* Corresponding author. Laboratoire des Sciences des Materiaux pour

l’Electronique et d’Automatique, Universite Blaise Pascal de Clermont II,

Les Cezeaux, 63177, Aubiere Cedex, France.

www.elsevier.com/locate/msec

Materials Science and Engineering C 21 (2002) 291–296

Page 2: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

shape of submicroscopic droplets [3]. The surface can be

stabilized by creating an established number of InSb mono-

layers before depositing the gold atoms. To be sure of the

disappearance of the In droplets, a high quantity of Sb was

evaporated and the excess was eliminated by heating the

substrate at 300 jC so that the metallic Sb desorbed from the

surface.

To realize a metallic gate, we have used a mask with

molybdenum. This mask allows to achieve electrical meas-

urements with a gold gate of 1-mm diameter and thick

layers of about 1000 A. Hence, the homogeneity studiesand

cleanliness of these deposits were possible. Lastly, let us

note that the current–voltage I(VG) characteristic measure-

ments were measured using a standard set-up (two 616

electrometer). The capacitances C, as a function with bias

voltage VG plotted at the frequency in the range between

100 Hz and 1 MHz, were measured with a PAR 129 A two-

phase Lock-in amplifier.

3. Computational model

The I(V) relation for non-ideal Schottky contact is given

by [4,5].

I ¼ Is 1� e�qV=kTh i

eqV=nkT ð1Þ

where q and T are the magnitude of the electron charge, the

temperature in Kelvin, respectively, and n is the ideality

factor. Is is the saturation current expressed by:

Is ¼ SA*T2exp � q

kT/Bn

h ið2Þ

A*, S and /Bn are the Richardson constant, the area of the

rectifying contact, the barrier height, respectively, and V is

the voltage drop across the rectifying barrier.

The energy of the interface states Ess, relative to the

conduction band edge Ec at the semiconductor surface, is

given by [6]:

Ec � Ess ¼ qð/Bn � V Þ ð3Þ

The density of the interface state Nss related to the interface

state capacitance Css is given by [1]:

Css ¼SqNss

wsarctgðwsÞ ð4Þ

where s is the relaxation time of the interface state and is

defined as follow [7]:

s ¼ 1

VthqnNd

eqVd=kT ð5Þ

where Nd, Vd are the doping concentration and the diffusion

potential, respectively, rn represents the cross-section of the

interface states and Vth is the thermal velocity of the carriers

(Vthc 107 cm s� 1).

For a Schottky diode with a thin interfacial layer between

the metal and the semiconductor (MIS), and at sufficiently

high frequencies such that the interface states cannot follow

the AC signal, the slope of the C� 2(V) relationship obtained

by Fonash [8] is given by:

dC�2

dV¼ 2

qesNd

Csc þ Ci

Csc þ ð1þ aÞCi

� �ð6Þ

where Ci and Csc are the interfacial layer and depletion zone

capacitances, respectively. The parameter a is given by:

a ¼ qNssdei

ð7Þ

The presence of a thin interfacial layer d implies that

CiHCsc, Eq. (6) can be reduce to:

dC�2

dV¼ 2

esq1

Ndð1þ aÞ

� �ð8Þ

According to relation (8), the slope of the high frequency

C � 2(V) is constant if the interfacial states density Nss is

Fig. 1. Ln[I/(1� e� qVG/kT)] variations versus bias.

B. Akkal et al. / Materials Science and Engineering C 21 (2002) 291–296292

Page 3: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

constant. We have a other behavior when Nss varies sig-

nificantly in the semiconductor energy band gap.

The extrapolated intercept, V0, of the high frequency

C� 2(V) curve is given by:

V0 ¼ V1=21 ðVd � kT=qÞ1=2 þ ð1þ aÞðVd � kT=qÞ

þ ð1� aÞ V1

4ð9Þ

where V1 is defined by :

V1 ¼2qesNdd

2

e2ið10Þ

For low values of d and Nd, the intercept, V0 of the C� 2(V)

plot with the V-axis can be reduced to:

V0 ¼ ðVd � kT=qÞð1þ aÞ ð11Þ

and the barrier height /Bn is described by the relation:

/Bn ¼ Vd þkT

qLn

Nc

Nd

ð12Þ

where Nc is the effective states density in the conduction

band.

4. Results and discussion

Typical Ln[I/(1� e� qVG/kT)] versus VG characteristics of

Au/heated InSb/InP(100) Schottky diode under forward

bias is reported in Fig. 1. This curve shows two linear

regions separated by a transition segment. From the first

region, the slope and the intercept of this plot on the current

axis allows to determine the ideality factor n and the

saturation current Is evaluated to 1.79 and 1.64� 10� 7

A, respectively.

At forward voltage considerably higher (VG > 0.4 V), the

Ln[I/(1� exp(� qVG/kT)] curves become straight lines and

thereby permit the determination of the series resistance Rs

from the slope of the second region [6]. The values of Rs so

obtained are equal to 230 V.

Fig. 2 shows clearly a low backward current and great

barrier height values equal to 0.63 eV. This is calculated by

substituting the Is value in Eq. (2).

The non-ideal I–VG characteristics indicate that the

diode is not intimate metal–semiconductor (MS) contacts

but instead have a metal-interface layer-semiconductor

(MIS) configuration. The DC current densities of several

AA even under low forward bias is too high for a thick

MIS and indicates that the interface layer thickness, dV 50

Fig. 2. I(VG) characteristic of the Au/heated InSb/InP structure.

Fig. 3. Variation of C(VG) characteristics with frequency.

B. Akkal et al. / Materials Science and Engineering C 21 (2002) 291–296 293

Page 4: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

A [9]. The lack of humps in the I–VG characteristics under

forward bias indicates that dz 30 A. If we take d = 40 A, it

gives a reasonably good fit to our data.

The plot of C(VG) characteristics with frequency is

shown in Fig. 3. In the high frequency, the interface states

cannot follow the AC signal and consequently do not

contribute appreciably to the junction capacitance. Hence,

the junction capacitance in the high frequency CHF, is

equal to the space charge capacitance, Csc. The situation

may be different at low and intermediate frequencies,

depending on the relaxation time of the interface states

and the frequency of the AC signal. Then, the interface

state capacitance Css(V, w/2p) can be expressed with the

measured values of C(V, 1 MHz) and C(V, w/2p) as follow[10].

CssðV , w=2pÞ ¼ CðV , w=2pÞ � CðV , 1 MHzÞ ð13Þ

Fig. 4 shows the evolution of Css(VG) curves as a

function of frequency. Similar curve for Css(w/2p) has beenobtained by Laflere and Van Meirhargher [11], and Morant

et al. [12] for Au/GaAs an Al/GaAs Schottky diodes,

respectively.

Fig. 4. Css(VG) variation versus frequency (Solid line Simulation, Symbol

Experimental).

Table 1

Experimental parameters obtained of Au/InSb/InP

Fast states Slow states

VG (V) Ec�Ess

(eV)

Nss

(eV� 1 cm� 2)

s (s) Nss

(eV� 1 cm� 2)

s (s) rn cm2

0.25 0.38 1.1�1011 10�4 2.6�1012 7.9�10� 3 2.16�10� 11

0.2 0.43 1.5�1011 1.5�10� 4 2.2�1012 1.1�10� 2 1.55�10� 11

0.14 0.49 1�1011 1.9�10� 4 1.6�1012 1.4�10� 2 1.22�10� 11

0.1 0.53 8.96�1010 2.3�10� 4 1.15�1012 1.9�10� 2 9�10� 12

0.05 0.58 9.3�1010 3.2�10� 4 9.9�1011 2.2�10� 2 7.78�10� 12

0.01 0.62 8�1010 3.9�10� 4 9.1�1011 2.4�10� 2 7.13�10� 12

Fig. 5. Cp(VG) variation versus frequency (Solid line Simulation, Symbol

Experimental).

B. Akkal et al. / Materials Science and Engineering C 21 (2002) 291–296294

Page 5: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

The data for diode Au/InSb/InP show a plateau in the

frequency range between 300 Hz and 1 kHz. We fitted the

theoretical formula (4) to the Css(V, w/2p) curve shown in

Fig. 4 in the frequency range between 1 and 20 kHz and

found good agreement between experiment and theory. To

obtain the dependence of s and Nss on the bias voltage VG,

the fitting procedure was repeated for various values of VG.

The dependence of Nss versus VG, obtained by the above

method was converted to function of Ess using Eq. (3). The

values of s and Nss as function of Ec�Ess for the ‘fast

states’ are shown in Table 1.

For low frequencies, a new quantity of the interface

states capacitance Cp(V, w/2p) is defined by:

CpðV , w=2pÞ ¼ CssðV , w=2pÞ � CsoðV Þ ð14Þ

where Cso(V) is the height of the plateau shown in Fig. 4.

We have fitted Eq. (4) to the experimental values of Cp(V,

w/2p) for frequencies w/2pV 1 kHz shown in Fig. 5 to

obtain the density of interface Nss and their relaxation time sfor the ‘‘slow states’’. These values of Nss, s and rn as

function of bias voltage are also shown in Table 1. A similar

distribution of capture cross-section rn has been reported in

the literature [13] and is probably due to the scatter of

interface state over a few atomic layers across the interface

layer-semiconductor boundary.

Fig. 6 gives a variation of C� 2(VG) with frequency. The

slope at high frequency (1 MHz) is constant, and is identical

to the slope of an ideal metal–semiconductor contact. For

frequencies w/2pV 20 kHz, the C � 2(VG) curves at reverse

voltage greater than 0.1 V show a curvature (concave

downwards), are attributed to the deep donor level in the

bulk.

The value of a equal to 0.25 is obtained using Eq. (7)

with ei = 4.5e0 [14] and the mean value of Nssc 1.57� 1012

eV � 1 cm � 2 obtained from the analysis of Cp(V) data.

Substituting this value into Eq. (8) and using the values of

dC � 2/dV at (1 MHz) (in Fig. 6) and es = 12.1e0 [15], we

have evaluated Nd to 4.65� 1015 cm� 3.

The intercept, V0 of C� 2(VG) plot at (1 MHz) with the

axis equal to 0.71, and the value of V1 calculated from Eq.

(10) allow to evaluate Vd which is equal to 0.58 V. (see Eq.

(11))

The calculated values of Nd and Vd were substituted in

Eq. (12) to determine the value of /Bn which is equal to

0.66 eV.

The value of /Bn obtained from the analysis of I(VG) data

is in good agreement with the one obtained from the C(VG)

measurement at height frequencies.

Our computation of the interface state density based on

the high frequency I(VG) and C(VG) characteristics is more

accurate than those obtained at low frequency [16].

In our case, we cannot plot the electrical characteristics at

the frequencies less than 100 Hz and consequently cannot

study the interface state computation for slow states. This is

due to the instability of the used set-up.

5. Conclusion

The studied Au/InSb/InP Schottky diode is an MIS

structure with interface states in thermal equilibrium with

the semiconductor. The I(VG) curve is not ideal and the ideal

factor n is controlled by the interface states density.

The linearity of the C � 2(VG) characteristic is due to the

uniform distribution of the interfacial states density Nss and

the dopage Nd in the band gap.

The peak value of the capacitance has been found to be

strongly dependent on the values of interface state density

and the frequency of the AC signal.

The heating treatment before Au deposition gives good

results in electrical measurements, so, we have obtained a

high quality Schottky type contact with elevated barrier

height values of 0.63 eV. These improvements can be

explained by the passivation of the substrate, using Sb

atoms, which prevent any migration of the semiconductor

components during the alumina and gold deposition.

The relaxation times shown in Table 1 is found to be

independent of bias VG or energy of interface states Ess.

The capture cross-section, rn, decreases exponentially

and it is independent of the bias. It varies between 2.16�10� 11 and 7.13� 10� 12 cm2.Fig. 6. C� 2(VG) variations versus bias VG.

B. Akkal et al. / Materials Science and Engineering C 21 (2002) 291–296 295

Page 6: Analysis and simulation of Au/InSb/InP diode C–V characteristic: modeling and experiments

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B. Akkal et al. / Materials Science and Engineering C 21 (2002) 291–296296